For well over three decades, semiconductor memories—such as, for example, DRAM'S, SRAM'S, ROM'S, EPROM'S, EEPROM'S, Flash EEPROM'S, Ferroelectric RAM'S, MAGRAM'S and others—have played a vital role in many electronic systems. Their functions for data storage, code (instruction) storage, and data retrieval/access (Read/Write) continue to span a wide variety of applications. Usage of these memories in both stand alone/discrete memory product forms, as well as embedded forms such as, for example, memory integrated with other functions like logic, in a module or monolithic integrated circuit, continues to grow. Cost, operating power, bandwidth, latency, ease of use, the ability to support broad applications (balanced vs. imbalanced accesses), and nonvolatility are all desirable attributes in a wide range of applications.
Before performing an access operation on a subset of memory cells in a dynamic random access memory (DRAM) device, the bit lines must be precharged. A precharge operation on all memory banks typically occurs at the end of each access operation (READ or WRITE) so that the banks are ready for the next access operation. Precharging all memory banks cycle consumes substantial power over time. Also, in traditional DRAM designs, access and precharge circuitry share common circuitry and connection paths to memory banks. Also, both operations are dependent on a single clock. Therefore, precharge and access operations are carried out sequentially, causing delay between access operations.